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BH2223FV
Standard IC
8bit 10ch D/A converter
BH2223FV
BH2223FV is an 8bit D/A converter for electronic adjustment. The 10-channel DC output voltage can be independently controlled by three-wire serial interface from micro-controller. The D/A converter can generate without loss by Rail-to-Rail output within the setting voltage. The built-in power on reset circuit keeps the output state Low after the power is on and prevents the unstable output state.
!Applications The voltage adjustment for DVC, DSC etc.
!Features 1) 8bit 10-channel D/A converters adopting R-2R system. 2) 3-wire 12-bit serial interface. 3) POWER ON RESET circuit. 4) The full scale output voltage range : 2.7V5.5V. 5) SSOPB16 package.
!Absolute maximum ratings (Ta=25C)
Parameter Power supply voltage Maximum output voltage Storage temperature Power dissipation Symbol VCC VIN Tstg Pd Limits -0.3~+7.0 -0.3~VCC -55~+125 400 Unit V V C mW
Reduced by 4mW for each increase in Ta of 1C over 25C. This product is not designed for protection against radioactive rays.
!Recommended operating conditions (Ta=25C)
Parameter VCC supply voltage Analog output source current Analog output sink current Operating temperature range Clock frequency Limit load capacitance Symbol VCC IOL IOH Topr FSCLK CL Min. 2.7 - - -20 - - Typ. - - - - 1.0 - Max. 5.5 1.0 1.0 85 - 0.1 Unit V mA mA C MHz F
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BH2223FV
Standard IC
!Block diagram
AO2
1 2
VCC
AO3
R-2R DAC
8bitREG + DEC
8bitREG + DEC
VCC
R-2R DAC
8bitREG + DEC
16 GND
R-2R DAC
15 AO1
VCC
VCC
AO4
3 4 5 6
VCC
R-2R DAC
8bitREG + DEC 8bitREG + DEC
VCC
Serial interface
14 DI 13 CLK
AO5
R-2R DAC
VCC
AO6
R-2R DAC R-2R DAC
8bitREG + DEC 8bitREG + DEC
POWER_ON RESET
12 LD 11 NC
AO7
VCC
VCC
AO8
7 8
R-2R DAC
8bitREG + DEC 8bitREG + DEC
8bitREG + DEC
R-2R DAC
VCC
10 AO10 9 VCC
AO9
R-2R DAC
!Pin descriptions
Pin No. Pin name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 AO2 AO3 AO4 AO5 AO6 AO7 AO8 AO9 VCC AO10 NC LD CLK DI AO1 GND In / Out OUT OUT OUT OUT OUT OUT OUT OUT - OUT OUT IN IN IN OUT - Power supply pin Analog output pins NC Serial Load input pin Serial Clock input pin Serial Data input pin Analog output pins Common GND pin Functions Analog output pins
VCC
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BH2223FV
Standard IC
!Electrical characteristics (unless otherwise noted, Ta=25C, VCC=3.0V, RL=OPEN, CL=0pF)
Parameter (80H set) VCC system Input low voltage Input high voltage Input low current Input high current ZS1 Minimum output voltage ZS2 ZS3 FS1 Maximum output voltage FS2 FS3 Resolution Differential nonlinearity error Nonlinearity error RES DNL INL - -1.0 -1.5 8 - - - 1.0 1.5 bit LSB LSB Input code 02H~FDH Input code 02H~FDH GND GND GND VCC -0.1 VCC -0.2 VCC -0.3 - - - - - - 0.1 0.2 0.3 VCC VCC VCC V V V V V V 00H set IOH=0.0mA 00H set IOH=0.5mA 00H set IOH=1.0mA FFH set IOL=0.0mA FFH set IOL=0.5mA FFH set IOL=1.0mA VIL VIH IIL IIH GND 0.8VCC - - - - - - 0.2VCC VCC 10 10 V V A A ICC - 1.1 2.5 mA CLK=1MHz Symbol Min. Typ. Max. Unit Conditions
!Circuit operation (1) Power on reset This LSI has a power on reset circuit that sets an analog output to low level in VCC power stand-up. Please be sure that the time constant meets below condition, because the output is undefined when VCC power stand up too rapidly.
Parameter VCC supply voltage rise time Power on reset voltage Symbol trVCC VPOR Min. 10 - Typ. - 1.9 Max. - - Unit ms V VCC=02.7V Conditions
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BH2223FV
Standard IC
(2) Conditions of operating timing (unless otherwise noted,Ta=25C, VCC=3.0V)
Parameter CLK L level pulse width CLK H level pulse width DI setup time DI hold time LD setup time LD hold time LD "H" level pulse width Analog output delay time Symbol tCLKL tCLKH tsDI thDI tsLD thLD tLDH tOUT Min. 200 200 30 60 200 100 100 - Typ. - - - - - - - - Max. - - - - - - - 300 Unit ns ns ns ns ns ns ns s CL=50pF, RL=10k Conditions
tCLKL
tCLKH 0.8VCC 0.2VCC
CLK
DI
LAST DATA
0.8VCC 0.2VCC
tsDI
thDI
tLDH tsLD
thLD 0.8VCC 0.2VCC
LD
OUTPUT
tOUT
0.8VCC 0.2VCC
A signal level is judged at 80% or 20% of VCC
Load conditions Analog output pin Measurement point
RL=10k
CL=50pF
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BH2223FV
Standard IC
(3) Command sending Control command is 3wire 12bit serial interface. (MSB first) Data is taken in with the rise edge of the CLK and output data is fixed in the LD high section. Data is maintained in the LD low section.
LSB (LAST) Data set D0 D1 D2 D3 D4 D5 D6 D7 D8 MSB (FIRST) Channel select D9 D10 D11
*Data set D0 0 1 0 1 0 D1 0 0 1 1 0 D2 0 0 0 0 1 D3 0 0 0 0 0 D4 0 0 0 0 0 D5 0 0 0 0 0 D6 0 0 0 0 0 D7 0 0 0 0 0 GND (VCC-GND) / 256x1 (VCC-GND) / 256x2 (VCC-GND) / 256x3 (VCC-GND) / 256x4 Analog output voltage level
0 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
(VCC-GND) / 256x254 (VCC-GND) / 256x255
*Channel select D8 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D9 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D10 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D11 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Adress select Don't Care AO1 AO2 AO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 Don't Care Don't Care Don't Care Don't Care Don't Care
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BH2223FV
Standard IC
!Operation notes (1) Regarding to the DNL & INL This item is guaranteed under below condition. Input code 02HFDH (2) Regarding to the power on reset function This function operates detecting the voltage level of the VCC. So, if the voltage level of the VCC become less than power on reset voltage when working, it is a possibility that the outputs become reset condition.
!External dimensions (Units : mm)
5.00.2
16 9
6.40.3 4.40.2
1
8
1.150.1 0.1
0.150.1 0.1
0.65
0.220.1
SSOP-B16
0.3Min.
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